clk: rockchip: Add MUXTBL variant
authorElaine Zhang <zhangqing@rock-chips.com>
Wed, 7 Sep 2022 16:01:56 +0000 (21:31 +0530)
committerHeiko Stuebner <heiko@sntech.de>
Tue, 13 Sep 2022 10:09:14 +0000 (12:09 +0200)
commit30d8b7d43c840f5907c0e688d41093f176ba8ac1
tree820fd500c4add2d430e5d1b804aadde51f16f071
parent1c23f9e627a7b412978b4e852793c5e3c3efc555
clk: rockchip: Add MUXTBL variant

Add a clock branch consisting of a mux with non-standard
select values. The parent in Mux table is sorted by priority.
Use clk_register_mux_table() to register such a mux-clock.

Cc: linux-clk@vger.kernel.org
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20220907160207.3845791-3-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk.c
drivers/clk/rockchip/clk.h