x86: Replace all sse instructions with vex equivilent in avx+ files
authorNoah Goldstein <goldstein.w.n@gmail.com>
Mon, 20 Jun 2022 20:02:10 +0000 (13:02 -0700)
committerNoah Goldstein <goldstein.w.n@gmail.com>
Thu, 23 Jun 2022 02:42:17 +0000 (19:42 -0700)
commit3079f652d7cc34456aefb412677c01e758922527
tree5d3f749db7fcfdeb17e3765858894a15c1267e26
parent3edda6a0f013736ca9554a95e553739a41dbd4b7
x86: Replace all sse instructions with vex equivilent in avx+ files

Most of these don't really matter as there was no dirty upper state
but we should generally avoid stray sse when its not needed.

The one case that really matters is in svml_d_tanh4_core_avx2.S:

blendvps %xmm0, %xmm8, %xmm7

When there was a dirty upper state.

Tested on x86_64-linux
75 files changed:
sysdeps/x86_64/fpu/multiarch/svml_d_acos4_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_acos8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_acosh4_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_acosh8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_asin4_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_asin8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_asinh4_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_asinh8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_atan24_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_atan28_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_atanh4_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_atanh8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_cbrt4_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_cosh4_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_cosh8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_erfc4_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_erfc8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_exp104_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_exp108_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_exp24_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_exp28_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_expm14_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_expm18_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_hypot4_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_hypot8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_log104_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_log108_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_log1p4_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_log1p8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_log24_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_log28_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_sinh4_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_sinh8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_tan4_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_tan8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_tanh4_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_d_tanh8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_acosf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_acosf8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_acoshf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_acoshf8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_asinf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_asinf8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_asinhf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_asinhf8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_atan2f16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_atan2f8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_atanhf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_atanhf8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_cbrtf8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_coshf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_coshf8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_erfcf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_erfcf8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_exp10f16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_exp10f8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_exp2f16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_exp2f8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_expm1f16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_expm1f8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_hypotf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_hypotf8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_log10f16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_log10f8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_log1pf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_log1pf8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_log2f16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_log2f8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_sinhf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_sinhf8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_tanf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_tanf8_core_avx2.S
sysdeps/x86_64/fpu/multiarch/svml_s_tanhf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_tanhf8_core_avx2.S
sysdeps/x86_64/multiarch/strrchr-avx2.S