drm/i915/gt: Add intel_gt_mcr_wait_for_reg_fw()
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 14 Oct 2022 23:02:32 +0000 (16:02 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Mon, 17 Oct 2022 17:13:59 +0000 (10:13 -0700)
commit3068bec83eea324b299105ec69a3f42c7968c6c0
treef5a806fd9cd6ef3b3fe7437dc47cc390e87c9195
parentab1b2d40d626bfb94d10e182a891fd21154234ef
drm/i915/gt: Add intel_gt_mcr_wait_for_reg_fw()

Xe_HP has some MCR registers that need to be polled for completion of
operations like TLB invalidation.  Those registers are in the GAM range,
which rolls up the status from each unit into the 'primary' instance's
value.  This makes it useful to have a dedicated 'wait for register'
function that handles this on MCR registers, similar to the
__intel_wait_for_register_fw() function we already have for regular
registers.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221014230239.1023689-8-matthew.d.roper@intel.com
drivers/gpu/drm/i915/gt/intel_gt_mcr.c
drivers/gpu/drm/i915/gt/intel_gt_mcr.h