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(parent: d1e222e) | patch
[X86] Add test case to show missed opportunity to turn (add (zext (vXi1 X)), Y) ...
authorCraig Topper <craig.topper@intel.com>
Fri, 27 Sep 2019 22:30:24 +0000 (22:30 +0000)
committerCraig Topper <craig.topper@intel.com>
Fri, 27 Sep 2019 22:30:24 +0000 (22:30 +0000)
commit305c811fd44182b753888059832b04ea4cbba3aa
tree13a65d536650ebfc4de5228f297436461adc4676tree | snapshot
parentd1e222e552d9f3d83083220e186c1f4c925e3e9ccommit | diff
[X86] Add test case to show missed opportunity to turn (add (zext (vXi1 X)), Y) -> (sub Y, (sext (vXi1 X))) with avx512.

With avx512, the vXi1 type is legal. And we can more easily sign
extend them to vector registers. zext requires a sign extend and
a shift.

If we can easily turn the zext into a sext we should.

llvm-svn: 373131
llvm/test/CodeGen/X86/avx512-vec-cmp.ll diff | blob | history
Domain: System / Toolchain;