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(parent: 03da9fa) | patch
drm/nouveau/fifo/gf100-: call into BAR to reset BARs after MMU fault
authorBen Skeggs <bskeggs@redhat.com>
Tue, 11 Dec 2018 04:50:02 +0000 (14:50 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Tue, 11 Dec 2018 05:37:47 +0000 (15:37 +1000)
commit302daab1a7b1206d33a9191d5b42ce606ed46e21
tree2c3e1bd9ddf54c03e5302c0f52529540bfe41bcetree | snapshot
parent03da9faae1562746e85f1a5e94e4c50a3b85b6b5commit | diff
drm/nouveau/fifo/gf100-: call into BAR to reset BARs after MMU fault

This is needed for Turing, but we're supposed to wait for completion after
re-writing the value on older GPUs anyway.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/include/nvkm/subdev/bar.h diff | blob | history
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c diff | blob | history
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c diff | blob | history
drivers/gpu/drm/nouveau/nvkm/subdev/bar/base.c diff | blob | history
Domain: System / Kernel;