[PowerPC] Disable perfect shuffle by default
authorQiu Chaofan <qiucofan@cn.ibm.com>
Tue, 15 Mar 2022 07:52:24 +0000 (15:52 +0800)
committerQiu Chaofan <qiucofan@cn.ibm.com>
Tue, 15 Mar 2022 07:52:24 +0000 (15:52 +0800)
commit300e1293de635adbe651030de5c8ebd3263458b2
treebda9b25066add5e192f750d5ed5dc6fb12c48405
parent23e3cbe24a51604a03a379664f67ed79e5fef897
[PowerPC] Disable perfect shuffle by default

We are going to remove the old 'perfect shuffle' optimization since it
brings performance penalty in hot loop around vectors. For example, in
following loop sharing the same mask:

  %v.1 = shufflevector ... <0,1,2,3,8,9,10,11,16,17,18,19,24,25,26,27>
  %v.2 = shufflevector ... <0,1,2,3,8,9,10,11,16,17,18,19,24,25,26,27>

The generated instructions will be `vmrglw-vmrghw-vmrglw-vmrghw` instead
of `vperm-vperm`. In some large loop cases, this causes 20%+ performance
penalty.

The original attempt to resolve this is to pre-record masks of every
shufflevector operation in DAG, but that is somewhat complex and brings
unnecessary computation (to scan all nodes) in optimization. Here we
disable it by default. There're indeed some cases becoming worse after
this, which will be fixed in a more careful way in future patches.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D121082
16 files changed:
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/test/CodeGen/PowerPC/2006-08-11-RetVector.ll
llvm/test/CodeGen/PowerPC/aix-p9-xxinsertw-xxextractuw.ll
llvm/test/CodeGen/PowerPC/aix-vsx-splatimm.ll
llvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll
llvm/test/CodeGen/PowerPC/extract-and-store.ll
llvm/test/CodeGen/PowerPC/load-and-splat.ll
llvm/test/CodeGen/PowerPC/p8altivec-shuffles-pred.ll
llvm/test/CodeGen/PowerPC/perfect-shuffle.ll
llvm/test/CodeGen/PowerPC/ppc-32bit-build-vector.ll
llvm/test/CodeGen/PowerPC/pr27078.ll
llvm/test/CodeGen/PowerPC/scalar_vector_test_4.ll
llvm/test/CodeGen/PowerPC/test-vector-insert.ll
llvm/test/CodeGen/PowerPC/vec_extract_p9.ll
llvm/test/CodeGen/PowerPC/vec_perf_shuffle.ll
llvm/test/CodeGen/PowerPC/vec_shuffle_p8vector.ll