ARM: t20/t30: swap host1x and disp1 clock parents
authorSvyatoslav Ryhel <clamor95@gmail.com>
Tue, 14 Feb 2023 17:35:24 +0000 (19:35 +0200)
committerTom <twarren@nvidia.com>
Thu, 23 Feb 2023 19:55:36 +0000 (12:55 -0700)
commit2fafac30efb9bb911b6e7159a02c080bccc9ae23
tree2f59445cdf39839ebc770cfc08f7aab4220f9506
parentfca18a26439037fb6a9e51fbe8cb5155fc79f05e
ARM: t20/t30: swap host1x and disp1 clock parents

According to mainline clock tables and TRM HOST1X
parent is PLLC, while DISP1 usually uses PLLP as
parent clock.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Tested-by: Thierry Reding <treding@nvidia.com> # Beaver T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Tom <twarren@nvidia.com>
arch/arm/mach-tegra/tegra20/clock.c
arch/arm/mach-tegra/tegra30/clock.c