Documentation/devicetree: Add PCIe max-link-speed property
authorShawn Lin <shawn.lin@rock-chips.com>
Mon, 14 Nov 2016 21:20:57 +0000 (15:20 -0600)
committerBjorn Helgaas <bhelgaas@google.com>
Mon, 14 Nov 2016 21:20:57 +0000 (15:20 -0600)
commit2fa39159b6a9931d6fd82ecbe65357e0ad77e1a4
treea98db41563f1d3689eef856dced74fee8ed72571
parent1001354ca34179f3db924eb66672442a173147dc
Documentation/devicetree: Add PCIe max-link-speed property

Some of the host drivers have the requirement of knowing whether the EP
would never train at some link speed at all.  For instance, on some boards,
the link won't train at 5 GT/s but the host driver still sacrifice some
cycles to wait for the result of training at 5 GT/s as the host could
actually support 5 GT/s.  So we could parse this new property and make the
host drivers be aware of these cases.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/pci/pci.txt