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ARM: tegra: set up the correct L2 data RAM latency for Cortex-A15
authorJoseph Lo <josephl@nvidia.com>
Wed, 3 Jul 2013 09:50:39 +0000 (17:50 +0800)
committerStephen Warren <swarren@nvidia.com>
Fri, 19 Jul 2013 16:08:05 +0000 (10:08 -0600)
commit2f5aaa3d2703256d37ae75818c495783d4ad0543
tree8a2a04aae10c5fc208e430e7fa4a457190fcfc03tree | snapshot
parentac2527bfc21739b77d687df1bfc4e973103fef7bcommit | diff
ARM: tegra: set up the correct L2 data RAM latency for Cortex-A15

When there is a cluster power down cycle in suspend, we need to set up
the correct L2 RAM data RAM latency to make L2 cache work correctly. This
is only needed for cluster 0 and needs to be done in tegra_resume before
the cache is enabled.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
arch/arm/mach-tegra/reset-handler.S diff | blob | history
arch/arm/mach-tegra/sleep.S diff | blob | history
Domain: System / Uncategorized;