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i965/hsw: Change L3 MOCS of SURFACE_STAT 63/7563/1
authorChad Versace <chad.versace@linux.intel.com>
Thu, 18 Jul 2013 17:00:15 +0000 (10:00 -0700)
committerChad Versace <chad.versace@linux.intel.com>
Thu, 18 Jul 2013 23:18:21 +0000 (16:18 -0700)
commit2f346395f5109c0fc4db86de3d2754001ddf0bb9
treeb1fd4aa3f2a41f0492eba26f57a0ec55c1a5ac7atree | snapshot
parenta16d47465ecdbaef0548207c1bc037493a67ebeccommit | diff
i965/hsw: Change L3 MOCS of SURFACE_STAT

Change from "not cacheable" to "cacheable" in L3.
Do so for the draw upload path and blorp.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
src/mesa/drivers/dri/i965/gen7_blorp.cpp diff | blob | history
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c diff | blob | history
Domain: Graphics System / GL;