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(parent: 4f16ebf) | patch
Mark all PPC CR registers to be spilled as live-in and tag MFCR appropriately
authorHal Finkel <hfinkel@anl.gov>
Sat, 13 Apr 2013 23:06:15 +0000 (23:06 +0000)
committerHal Finkel <hfinkel@anl.gov>
Sat, 13 Apr 2013 23:06:15 +0000 (23:06 +0000)
commit2f293915040315b5bc9a4606d113a86034298078
tree475d96e9b4281db452769cb4398e8ae47da60cfctree | snapshot
parent4f16ebfb3066138da0f501bbfbcbb5d6a57ad35fcommit | diff
Mark all PPC CR registers to be spilled as live-in and tag MFCR appropriately

Leaving MFCR has having unmodeled side effects is not enough to prevent
unwanted instruction reordering post-RA. We could probably apply a stronger
barrier attribute, but there is a better way: Add all (not just the first) CR
to be spilled as live-in to the entry block, and add all CRs to the MFCR
instruction as implicitly killed.

Unfortunately, I don't have a small test case.

llvm-svn: 179465
llvm/lib/Target/PowerPC/PPCFrameLowering.cpp diff | blob | history
llvm/lib/Target/PowerPC/PPCInstr64Bit.td diff | blob | history
llvm/lib/Target/PowerPC/PPCInstrInfo.td diff | blob | history
Domain: System / Toolchain;