pinctrl: armada-37xx: Add irqchip support
authorGregory CLEMENT <gregory.clement@free-electrons.com>
Fri, 28 Apr 2017 14:01:33 +0000 (16:01 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 22 May 2017 08:39:24 +0000 (10:39 +0200)
commit2f227605394bbab75511d54f0773e9dbe2976ee3
treed53ee45fff896112be89f64944a6de030394f97c
parentcdbbd26f482b569b9c3a3b49887699f7a956d4e0
pinctrl: armada-37xx: Add irqchip support

The Armada 37xx SoCs can handle interrupt through GPIO. However it can
only manage the edge ones.

The way the interrupt are managed is classical so we can use the generic
interrupt chip model.

The only unusual "feature" is that many interrupts are connected to the
parent interrupt controller. But we do not take advantage of this and use
the chained irq with all of them.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c