i965/fs: Don't interfere with too many base registers
authorJason Ekstrand <jason.ekstrand@intel.com>
Tue, 7 Oct 2014 04:27:06 +0000 (21:27 -0700)
committerJason Ekstrand <jason.ekstrand@intel.com>
Fri, 24 Oct 2014 23:24:05 +0000 (16:24 -0700)
commit2ec161b2396b08341264965a5825152784b54549
treeb1ecc9bc9ac7987d6cc6540a74e9acb7578d3573
parentee65f2b50d5a411e05fb4e0dbe26766a47305b59
i965/fs: Don't interfere with too many base registers

On older GENs in SIMD16 mode, we were accidentally building too much
interference into our register classes.  Since everything is divided by 2,
the reigster allocator thinks we have 64 base registers instead of 128.
The actual GRF mapping still needs to be doubled, but as far as the ra_set
is concerned, we only have 64.  We were accidentally adding way too much
interference.

Signed-off-by: Jason Ekstrand <jason.ekstrand@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp