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[ELF] Rewrite R_RISCV_ALIGN nops when r.addend%4 != 0
authorFangrui Song <i@maskray.me>
Mon, 26 Sep 2022 21:20:27 +0000 (14:20 -0700)
committerTobias Hieta <tobias@hieta.se>
Wed, 28 Sep 2022 06:16:35 +0000 (08:16 +0200)
commit2eba4dd78e2a47a36a65617f17d5ea156cfb6448
tree8fa463aebff0d0e0c3f9cab53862a1ae46e54b13tree | snapshot
parent451e3b68306d0d8a9be9065420924530053ff29bcommit | diff
[ELF] Rewrite R_RISCV_ALIGN nops when r.addend%4 != 0

For RVC, GNU assembler and LLVM integrated assembler add c.nop followed by a
sequence of 4-byte nops. Even if remove % 4 == 0, we have to split one 4-byte
nop and therefore need to write the code sequence, otherwise we create an
incorrect c.unimp.

(cherry picked from commit 78084d9e77b9a2017e2215491b71b37c2671c292)
lld/ELF/Arch/RISCV.cpp diff | blob | history
lld/test/ELF/riscv-relax-align-rvc.s diff | blob | history
Domain: System / Toolchain;