Fix ARM ICE for register var asm ("pc") (PR target/60606).
authorjsm28 <jsm28@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 26 Aug 2014 17:06:31 +0000 (17:06 +0000)
committerjsm28 <jsm28@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 26 Aug 2014 17:06:31 +0000 (17:06 +0000)
commit2ea8d8696bce22da336f42000f21ca687e5e679c
tree2f34eb8a53683a3f2846042c1e5dfe9d0d5c16ed
parent487d98ee5986dd7801e05405fafd3c8e64642df7
Fix ARM ICE for register var asm ("pc") (PR target/60606).

PR target/60606
PR target/61330
* varasm.c (make_decl_rtl): Clear DECL_ASSEMBLER_NAME and
DECL_HARD_REGISTER and return for invalid register specifications.
* cfgexpand.c (expand_one_var): If expand_one_hard_reg_var clears
DECL_HARD_REGISTER, call expand_one_error_var.
* config/arm/arm.c (arm_hard_regno_mode_ok): Do not allow
CC_REGNUM with non-MODE_CC modes.
(arm_regno_class): Return NO_REGS for PC_REGNUM.

testsuite:
* gcc.dg/torture/pr60606-1.c, gcc.target/arm/pr60606-2.c,
gcc.target/arm/pr60606-3.c, gcc.target/arm/pr60606-4.c: New tests.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@214526 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/cfgexpand.c
gcc/config/arm/arm.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.dg/torture/pr60606-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/arm/pr60606-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/arm/pr60606-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/arm/pr60606-4.c [new file with mode: 0644]
gcc/varasm.c