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i2c-designware: Support multiple cores using same ISR
authorDirk Brandewie <dirk.brandewie@gmail.com>
Thu, 25 Aug 2011 11:14:03 +0000 (12:14 +0100)
committermgross <mark.gross@intel.com>
Wed, 9 Nov 2011 20:37:38 +0000 (12:37 -0800)
commit2ea37bca69129af6a1327013151c8dea9e63425b
tree81005461ba2630b09b960bf1622b09c87e70d090tree | snapshot
parentc5a0d6a29723c192e04ff1f0ba47834e57a9bdaecommit | diff
i2c-designware: Support multiple cores using same ISR

Add check to make sure that the core is enabled and has outstanding
interrupts. The activity bit is masked due to the fact that it will
stay active even after the controller has been disabled until the
contoller internal state machines have settled.

Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Alan Cox <alan@linux.intel.com>
drivers/i2c/busses/i2c-designware-core.c diff | blob | history
Domain: System / Kernel;