drm/amdgpu: set snoop bit in pde/pte entries for A+A
authorEric Huang <jinhuieric.huang@amd.com>
Sat, 27 Feb 2021 22:46:44 +0000 (17:46 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 24 Mar 2021 03:00:46 +0000 (23:00 -0400)
commit2e2f197f4c994cf60ccd43a55b202bd0c5d679ba
tree1dcb4318275ffd012c4b8bcdf9f47a4716bc0c60
parent06bfc045d54cd7cb769aab5af45f6022c2ce77a7
drm/amdgpu: set snoop bit in pde/pte entries for A+A

Page tables in vram mapping to cpu is changed from uncached to
cached in A+A, the snoop bit in VM_CONTEXTx_PAGE_TABLE_BASE_ADDR/
PDE0s/PDE1s/PDE2s/PTE.TFs has to be set so gpuvm walker snoop
page table data out of CPU cache.

Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c