KVM: PPC: Book3S HV: Implement radix prefetch workaround by disabling MMU
authorNicholas Piggin <npiggin@gmail.com>
Fri, 28 May 2021 09:07:41 +0000 (19:07 +1000)
committerMichael Ellerman <mpe@ellerman.id.au>
Thu, 10 Jun 2021 12:12:14 +0000 (22:12 +1000)
commit2e1ae9cd56f8616a707185f3c6cb7ee2a20809e1
tree820ef3667a86af583ace51c09976380cf92dd23f
parent41f779917669fcc28a7f5646d1f7a85043c9d152
KVM: PPC: Book3S HV: Implement radix prefetch workaround by disabling MMU

Rather than partition the guest PID space + flush a rogue guest PID to
work around this problem, instead fix it by always disabling the MMU when
switching in or out of guest MMU context in HV mode.

This may be a bit less efficient, but it is a lot less complicated and
allows the P9 path to trivally implement the workaround too. Newer CPUs
are not subject to this issue.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210528090752.3542186-22-npiggin@gmail.com
arch/powerpc/include/asm/mmu_context.h
arch/powerpc/kvm/book3s_hv.c
arch/powerpc/kvm/book3s_hv_p9_entry.c
arch/powerpc/kvm/book3s_hv_rmhandlers.S
arch/powerpc/mm/book3s64/radix_pgtable.c
arch/powerpc/mm/book3s64/radix_tlb.c
arch/powerpc/mm/mmu_context.c