drm/i915/tgl: Define MOCS entries for Tigerlake
authorTomasz Lis <tomasz.lis@intel.com>
Tue, 30 Jul 2019 18:04:05 +0000 (11:04 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Wed, 31 Jul 2019 14:40:31 +0000 (07:40 -0700)
commit2ddf992179c45fb93de190b5c6ae16d2a4f4849a
treefa2ff20e3516b004a022cb20a9cd611b957c38db
parent23dea05191be897a5f30416342c3cff101f2701c
drm/i915/tgl: Define MOCS entries for Tigerlake

The MOCS table is published as part of bspec, and versioned. Entries
are supposed to never be modified, but new ones can be added. Adding
entries increases table version. The patch includes version 1 entries.

Two of the 3 legacy entries used for gen9 are no longer expected to work.
Although we are changing the gen11 table, those changes are supposed to
be backward compatible since we are only touching previously undefined
entries.

v2: Add the missing entries in 49-51 range and replace "HW reserved"
    terminology to what it actually is: L1 is implicitly enabled
    (from Daniele)
v3: Use a different table for Tiger Lake since entries 0 and 1 are not
    the same (from Daniele)

Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190730180407.5993-4-lucas.demarchi@intel.com
drivers/gpu/drm/i915/gt/intel_mocs.c