RISC-V: Add vxor.vv C API tests
authorJu-Zhe Zhong <juzhe.zhong@rivai.ai>
Tue, 31 Jan 2023 12:12:06 +0000 (20:12 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Tue, 31 Jan 2023 16:47:39 +0000 (00:47 +0800)
commit2db1fd76ebaa6da8c868bb610b3e36d1ef504036
tree4b07c68f15b2e19f4427d1079af2f8c4bd3957e4
parent2a937fb5cf805c7311f1d9ecf98b60bedc922165
RISC-V: Add vxor.vv C API tests

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/vxor_vv-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vv-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vv-3.c: New test.
* gcc.target/riscv/rvv/base/vxor_vv_m-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vv_m-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vv_m-3.c: New test.
* gcc.target/riscv/rvv/base/vxor_vv_mu-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vv_mu-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vv_mu-3.c: New test.
* gcc.target/riscv/rvv/base/vxor_vv_tu-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vv_tu-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vv_tu-3.c: New test.
* gcc.target/riscv/rvv/base/vxor_vv_tum-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vv_tum-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vv_tum-3.c: New test.
* gcc.target/riscv/rvv/base/vxor_vv_tumu-1.c: New test.
* gcc.target/riscv/rvv/base/vxor_vv_tumu-2.c: New test.
* gcc.target/riscv/rvv/base/vxor_vv_tumu-3.c: New test.
18 files changed:
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv_m-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv_m-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv_m-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv_mu-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv_mu-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv_mu-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv_tu-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv_tu-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv_tu-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv_tum-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv_tum-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv_tum-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv_tumu-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv_tumu-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/base/vxor_vv_tumu-3.c [new file with mode: 0644]