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i386: Emulate MMX ssse3_ph<plusminus_mnemonic>wv4hi3 with SSE
authorH.J. Lu <hongjiu.lu@intel.com>
Wed, 15 May 2019 15:22:39 +0000 (15:22 +0000)
committerH.J. Lu <hjl@gcc.gnu.org>
Wed, 15 May 2019 15:22:39 +0000 (08:22 -0700)
commit2da47f31e33b13e528006be0ae2287e7f470962f
treecda58234b8d807d724099d661299ac5067af0beetree | snapshot
parent84791fca67654942f39586b56166fcf22ef77553commit | diff
i386: Emulate MMX ssse3_ph<plusminus_mnemonic>wv4hi3 with SSE

Emulate MMX ssse3_ph<plusminus_mnemonic>wv4hi3 with SSE by moving bits
64:95 to bits 32:63 in SSE register.  Only SSE register source operand
is allowed.

PR target/89021
* config/i386/sse.md (ssse3_ph<plusminus_mnemonic>wv4hi3):
Changed to define_insn_and_split to support SSE emulation.

From-SVN: r271241
gcc/ChangeLog diff | blob | history
gcc/config/i386/sse.md diff | blob | history
Domain: System / Toolchain;