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(parent: 92903d0) | patch
MIPS: Fixing floating point register clobbering
authorivica.bogosavljevic <ivica.bogosavljevic@imgtec.com>
Wed, 16 Sep 2015 12:15:15 +0000 (05:15 -0700)
committerCommit bot <commit-bot@chromium.org>
Wed, 16 Sep 2015 12:15:31 +0000 (12:15 +0000)
commit2d8d02f5558386438c3765146edecf5c5706fba3
treee657b8efe8aab246e9699e02becc41ea0bb5662ftree | snapshot
parent92903d0a1998aa4774c5b6ae61edc36187006216commit | diff
MIPS: Fixing floating point register clobbering

Fixing floating point register clobbering for MIPSr6 (32 and 64)
due to using of f31 floating point register as double compare register,
without saving the value of the register before using it.

TEST=cctest/test-debug/*
BUG=

Review URL: https://codereview.chromium.org/1346623002

Cr-Commit-Position: refs/heads/master@{#30765}
src/mips/assembler-mips.h diff | blob | history
src/mips64/assembler-mips64.h diff | blob | history
Domain: Web Framework / Web Engine;