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(parent: 8f2bf2a) | patch
clk: sunxi: Add apb0 gates for A83T
authorVishnu Patekar <vishnupatekar0510@gmail.com>
Sun, 31 Jan 2016 01:20:54 +0000 (09:20 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Tue, 2 Feb 2016 13:11:46 +0000 (14:11 +0100)
commit2d6f5f0cf6bfb17b8f0102cabe0665098ce0a865
tree8316dee65eca80c1abd62ca54d22e35febec7dadtree | snapshot
parent8f2bf2ad9673e187b5c2956497003f60e0885e5dcommit | diff
clk: sunxi: Add apb0 gates for A83T

APB0 is part of PRCM, and is compatible with earlier SOCs.
apb0 gates controls R_PIO, R_UART, R_RSB, etc clocks.
This patch adds support for APB0 gates for A83T.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Documentation/devicetree/bindings/clock/sunxi.txt diff | blob | history
drivers/clk/sunxi/clk-simple-gates.c diff | blob | history
Domain: System / Kernel;