[X86][Costmodel] Load/store i8 Stride=2 VF=32 interleaving costs
authorRoman Lebedev <lebedev.ri@gmail.com>
Wed, 29 Sep 2021 18:42:01 +0000 (21:42 +0300)
committerRoman Lebedev <lebedev.ri@gmail.com>
Wed, 29 Sep 2021 18:52:45 +0000 (21:52 +0300)
commit2d42a192e02af9d89dde356a48270fc7d1ef5b16
tree87a1a755c252cbcd35634e0888a41006c52091d7
parentbac60c55e0ff88f0f61ffed330374699216e1329
[X86][Costmodel] Load/store i8 Stride=2 VF=32 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/xz6x7c35P - for intels `Block RThroughput: =6.0`; for ryzens, `Block RThroughput: <=2.5`
So pick cost of `6`.

For store we have:
https://godbolt.org/z/xz6x7c35P - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: <=2.0`
So pick cost of `4`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110709
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-2.ll