[X86] Handle COPYs of physregs better (regalloc hints)
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Wed, 19 Sep 2018 18:59:08 +0000 (18:59 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Wed, 19 Sep 2018 18:59:08 +0000 (18:59 +0000)
commit2d0f20cc043458c945e4959c5b130c07a7f5b8b5
tree4c6c2685582012433738444bea2cce36c82c7b04
parent894c39f770298e8972d3518c9b3531b59c819f56
[X86] Handle COPYs of physregs better (regalloc hints)

Enable enableMultipleCopyHints() on X86.

Original Patch by @jonpa:

While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling.

Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates.

Differential Revision: https://reviews.llvm.org/D38128

llvm-svn: 342578
223 files changed:
llvm/lib/Target/X86/X86RegisterInfo.h
llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll
llvm/test/CodeGen/X86/GlobalISel/and-scalar.ll
llvm/test/CodeGen/X86/GlobalISel/ashr-scalar.ll
llvm/test/CodeGen/X86/GlobalISel/binop.ll
llvm/test/CodeGen/X86/GlobalISel/callingconv.ll
llvm/test/CodeGen/X86/GlobalISel/ext-x86-64.ll
llvm/test/CodeGen/X86/GlobalISel/ext.ll
llvm/test/CodeGen/X86/GlobalISel/lshr-scalar.ll
llvm/test/CodeGen/X86/GlobalISel/memop-scalar.ll
llvm/test/CodeGen/X86/GlobalISel/mul-scalar.ll
llvm/test/CodeGen/X86/GlobalISel/or-scalar.ll
llvm/test/CodeGen/X86/GlobalISel/phi.ll
llvm/test/CodeGen/X86/GlobalISel/ptrtoint.ll
llvm/test/CodeGen/X86/GlobalISel/shl-scalar-widening.ll
llvm/test/CodeGen/X86/GlobalISel/shl-scalar.ll
llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll
llvm/test/CodeGen/X86/GlobalISel/trunc.ll
llvm/test/CodeGen/X86/GlobalISel/undef.ll
llvm/test/CodeGen/X86/GlobalISel/xor-scalar.ll
llvm/test/CodeGen/X86/add.ll
llvm/test/CodeGen/X86/addcarry.ll
llvm/test/CodeGen/X86/and-encoding.ll
llvm/test/CodeGen/X86/andimm8.ll
llvm/test/CodeGen/X86/anyext.ll
llvm/test/CodeGen/X86/apm.ll
llvm/test/CodeGen/X86/atomic-eflags-reuse.ll
llvm/test/CodeGen/X86/atomic128.ll
llvm/test/CodeGen/X86/avg.ll
llvm/test/CodeGen/X86/avoid-sfb.ll
llvm/test/CodeGen/X86/avx-intel-ocl.ll
llvm/test/CodeGen/X86/avx-vinsertf128.ll
llvm/test/CodeGen/X86/avx512-arith.ll
llvm/test/CodeGen/X86/avx512-calling-conv.ll
llvm/test/CodeGen/X86/avx512-insert-extract.ll
llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll
llvm/test/CodeGen/X86/avx512-mask-op.ll
llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
llvm/test/CodeGen/X86/avx512-schedule.ll
llvm/test/CodeGen/X86/avx512-select.ll
llvm/test/CodeGen/X86/avx512bw-mask-op.ll
llvm/test/CodeGen/X86/avx512dq-mask-op.ll
llvm/test/CodeGen/X86/avx512vl-arith.ll
llvm/test/CodeGen/X86/bigstructret.ll
llvm/test/CodeGen/X86/bitcast-i256.ll
llvm/test/CodeGen/X86/bitcast-int-to-vector-bool.ll
llvm/test/CodeGen/X86/bitreverse.ll
llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll
llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll
llvm/test/CodeGen/X86/bmi.ll
llvm/test/CodeGen/X86/bmi2.ll
llvm/test/CodeGen/X86/bool-math.ll
llvm/test/CodeGen/X86/bool-simplify.ll
llvm/test/CodeGen/X86/bswap-rotate.ll
llvm/test/CodeGen/X86/bswap-wide-int.ll
llvm/test/CodeGen/X86/bswap.ll
llvm/test/CodeGen/X86/bswap_tree.ll
llvm/test/CodeGen/X86/bswap_tree2.ll
llvm/test/CodeGen/X86/bt.ll
llvm/test/CodeGen/X86/btc_bts_btr.ll
llvm/test/CodeGen/X86/bypass-slow-division-64.ll
llvm/test/CodeGen/X86/clear-highbits.ll
llvm/test/CodeGen/X86/clear-lowbits.ll
llvm/test/CodeGen/X86/cmov-into-branch.ll
llvm/test/CodeGen/X86/cmov.ll
llvm/test/CodeGen/X86/cmovcmov.ll
llvm/test/CodeGen/X86/cmp.ll
llvm/test/CodeGen/X86/cmpxchg-clobber-flags.ll
llvm/test/CodeGen/X86/cmpxchg-i128-i1.ll
llvm/test/CodeGen/X86/combine-add.ll
llvm/test/CodeGen/X86/combine-rotates.ll
llvm/test/CodeGen/X86/combine-sdiv.ll
llvm/test/CodeGen/X86/combine-udiv.ll
llvm/test/CodeGen/X86/combine-urem.ll
llvm/test/CodeGen/X86/conditional-indecrement.ll
llvm/test/CodeGen/X86/dagcombine-select.ll
llvm/test/CodeGen/X86/divide-by-constant.ll
llvm/test/CodeGen/X86/divrem.ll
llvm/test/CodeGen/X86/divrem8_ext.ll
llvm/test/CodeGen/X86/extract-lowbits.ll
llvm/test/CodeGen/X86/fast-isel-fold-mem.ll
llvm/test/CodeGen/X86/fast-isel-select-cmov.ll
llvm/test/CodeGen/X86/fast-isel-select-cmov2.ll
llvm/test/CodeGen/X86/fast-isel-select-pseudo-cmov.ll
llvm/test/CodeGen/X86/fast-isel-sext-zext.ll
llvm/test/CodeGen/X86/fast-isel-shift.ll
llvm/test/CodeGen/X86/fast-isel-store.ll
llvm/test/CodeGen/X86/fixup-bw-copy.ll
llvm/test/CodeGen/X86/fma.ll
llvm/test/CodeGen/X86/fold-vector-sext-crash2.ll
llvm/test/CodeGen/X86/funnel-shift-rot.ll
llvm/test/CodeGen/X86/funnel-shift.ll
llvm/test/CodeGen/X86/ghc-cc64.ll
llvm/test/CodeGen/X86/hipe-cc64.ll
llvm/test/CodeGen/X86/i128-mul.ll
llvm/test/CodeGen/X86/iabs.ll
llvm/test/CodeGen/X86/imul.ll
llvm/test/CodeGen/X86/lea-opt.ll
llvm/test/CodeGen/X86/legalize-shift-64.ll
llvm/test/CodeGen/X86/legalize-shl-vec.ll
llvm/test/CodeGen/X86/machine-combiner-int.ll
llvm/test/CodeGen/X86/machine-cp.ll
llvm/test/CodeGen/X86/machine-cse.ll
llvm/test/CodeGen/X86/madd.ll
llvm/test/CodeGen/X86/mask-negated-bool.ll
llvm/test/CodeGen/X86/misched-matmul.ll
llvm/test/CodeGen/X86/mul-constant-i16.ll
llvm/test/CodeGen/X86/mul-constant-i32.ll
llvm/test/CodeGen/X86/mul-constant-i64.ll
llvm/test/CodeGen/X86/mul-i1024.ll
llvm/test/CodeGen/X86/mul-i256.ll
llvm/test/CodeGen/X86/mul-i512.ll
llvm/test/CodeGen/X86/mul128.ll
llvm/test/CodeGen/X86/mul64.ll
llvm/test/CodeGen/X86/mwaitx-schedule.ll
llvm/test/CodeGen/X86/mwaitx.ll
llvm/test/CodeGen/X86/negate-i1.ll
llvm/test/CodeGen/X86/negate-shift.ll
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llvm/test/CodeGen/X86/no-sse2-avg.ll
llvm/test/CodeGen/X86/not-and-simplify.ll
llvm/test/CodeGen/X86/palignr.ll
llvm/test/CodeGen/X86/peep-setb.ll
llvm/test/CodeGen/X86/pku.ll
llvm/test/CodeGen/X86/pmaddubsw.ll
llvm/test/CodeGen/X86/pmulh.ll
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llvm/test/CodeGen/X86/ptest.ll
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llvm/test/CodeGen/X86/rotate.ll
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llvm/test/CodeGen/X86/rotate4.ll
llvm/test/CodeGen/X86/sar_fold64.ll
llvm/test/CodeGen/X86/sat-add.ll
llvm/test/CodeGen/X86/scalar_widen_div.ll
llvm/test/CodeGen/X86/schedule-x86-64-shld.ll
llvm/test/CodeGen/X86/schedule-x86_64.ll
llvm/test/CodeGen/X86/select.ll
llvm/test/CodeGen/X86/select_const.ll
llvm/test/CodeGen/X86/selectcc-to-shiftand.ll
llvm/test/CodeGen/X86/setcc-logic.ll
llvm/test/CodeGen/X86/sext-i1.ll
llvm/test/CodeGen/X86/shift-and.ll
llvm/test/CodeGen/X86/shift-bmi2.ll
llvm/test/CodeGen/X86/shift-double-x86_64.ll
llvm/test/CodeGen/X86/shift-double.ll
llvm/test/CodeGen/X86/shift-pair.ll
llvm/test/CodeGen/X86/shuffle-of-insert.ll
llvm/test/CodeGen/X86/signbit-shift.ll
llvm/test/CodeGen/X86/sret-implicit.ll
llvm/test/CodeGen/X86/sse1.ll
llvm/test/CodeGen/X86/sse3-intrinsics-x86.ll
llvm/test/CodeGen/X86/sse3-schedule.ll
llvm/test/CodeGen/X86/sse42-intrinsics-fast-isel-x86_64.ll
llvm/test/CodeGen/X86/sse42-intrinsics-fast-isel.ll
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llvm/test/CodeGen/X86/sse42-intrinsics-x86_64.ll
llvm/test/CodeGen/X86/sse42-schedule.ll
llvm/test/CodeGen/X86/sttni.ll
llvm/test/CodeGen/X86/subcarry.ll
llvm/test/CodeGen/X86/swift-return.ll
llvm/test/CodeGen/X86/swifterror.ll
llvm/test/CodeGen/X86/system-intrinsics-xsetbv.ll
llvm/test/CodeGen/X86/tbm-intrinsics-fast-isel-x86_64.ll
llvm/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll
llvm/test/CodeGen/X86/tbm_patterns.ll
llvm/test/CodeGen/X86/trunc-subvector.ll
llvm/test/CodeGen/X86/twoaddr-lea.ll
llvm/test/CodeGen/X86/umul-with-overflow.ll
llvm/test/CodeGen/X86/umulo-128-legalisation-lowering.ll
llvm/test/CodeGen/X86/unfold-masked-merge-scalar-constmask-innerouter.ll
llvm/test/CodeGen/X86/unfold-masked-merge-scalar-constmask-interleavedbits.ll
llvm/test/CodeGen/X86/unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
llvm/test/CodeGen/X86/unfold-masked-merge-scalar-constmask-lowhigh.ll
llvm/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll
llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask-const.ll
llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll
llvm/test/CodeGen/X86/urem-power-of-two.ll
llvm/test/CodeGen/X86/urem-seteq-optsize.ll
llvm/test/CodeGen/X86/use-add-flags.ll
llvm/test/CodeGen/X86/vec_cast.ll
llvm/test/CodeGen/X86/vector-bitreverse.ll
llvm/test/CodeGen/X86/vector-blend.ll
llvm/test/CodeGen/X86/vector-compare-results.ll
llvm/test/CodeGen/X86/vector-interleave.ll
llvm/test/CodeGen/X86/vector-pcmp.ll
llvm/test/CodeGen/X86/vector-reduce-fadd-fast.ll
llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll
llvm/test/CodeGen/X86/vector-shuffle-combining-sse4a.ll
llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll
llvm/test/CodeGen/X86/vector-shuffle-combining.ll
llvm/test/CodeGen/X86/vector-zext.ll
llvm/test/CodeGen/X86/vectorcall.ll
llvm/test/CodeGen/X86/vselect-minmax.ll
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llvm/test/CodeGen/X86/widen_load-2.ll
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llvm/test/CodeGen/X86/win64_vararg.ll
llvm/test/CodeGen/X86/x64-cet-intrinsics.ll
llvm/test/CodeGen/X86/x86-64-bittest-logic.ll
llvm/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll
llvm/test/CodeGen/X86/x86-cmov-converter.ll
llvm/test/CodeGen/X86/x86-shrink-wrapping.ll
llvm/test/CodeGen/X86/xaluo.ll
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llvm/test/CodeGen/X86/xmulo.ll
llvm/test/CodeGen/X86/xor.ll
llvm/test/DebugInfo/COFF/pieces.ll
llvm/test/DebugInfo/X86/live-debug-values.ll
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