audio: fixed pdm clk and pamaraters for fixed pll decimal mode
authorXing Wang <xing.wang@amlogic.com>
Tue, 7 Nov 2017 07:28:51 +0000 (15:28 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Fri, 10 Nov 2017 08:13:12 +0000 (01:13 -0700)
commit2cedfd7494208d1635dff7033670b43c2d24736e
tree617b2319d46732ec05e8edc19214a13d8bb8c46a
parent56136d1572f74c5a5278bc4cf4ffcdff54f16c62
audio: fixed pdm clk and pamaraters for fixed pll decimal mode

PD#154040: fixed pdm record data is only DC value issue.
1. fixed pdm sys clk to 133m
2. fixed sample count according to dclk

Change-Id: Ica8a21c9877c9bf81f157e5590fd08e2860140f9
Signed-off-by: Xing Wang <xing.wang@amlogic.com>
13 files changed:
arch/arm64/boot/dts/amlogic/axg_a113d_skt.dts
arch/arm64/boot/dts/amlogic/axg_a113x_skt.dts
arch/arm64/boot/dts/amlogic/axg_s400.dts
arch/arm64/boot/dts/amlogic/axg_s400_v03.dts
arch/arm64/boot/dts/amlogic/axg_s400emmc.dts
arch/arm64/boot/dts/amlogic/axg_s400emmc_v03.dts
arch/arm64/boot/dts/amlogic/axg_s420.dts
arch/arm64/boot/dts/amlogic/axg_s420_128m.dts
arch/arm64/boot/dts/amlogic/axg_s420_v03.dts
sound/soc/amlogic/auge/pdm.c
sound/soc/amlogic/auge/pdm.h
sound/soc/amlogic/auge/pdm_hw.c
sound/soc/amlogic/auge/pdm_hw.h