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dt-bindings: clock: sparx5: Add Sparx5 SoC DPLL clock
authorLars Povlsen <lars.povlsen@microchip.com>
Mon, 15 Jun 2020 13:32:38 +0000 (15:32 +0200)
committerArnd Bergmann <arnd@arndb.de>
Wed, 22 Jul 2020 20:28:43 +0000 (22:28 +0200)
commit2ce39f20d0bfa2cae289beaf0ab1aa37fb2b93e6
treec19eecd203d615059ed1bc5a4a089240ec124b71tree | snapshot
parent14bc6703b387cac2a9bec8f8d6bbffea63db43eacommit | diff
dt-bindings: clock: sparx5: Add Sparx5 SoC DPLL clock

This add the DT bindings documentation for the Sparx5 SoC DPLL clock

Link: https://lore.kernel.org/r/20200615133242.24911-7-lars.povlsen@microchip.com
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml [new file with mode: 0644] blob
Domain: System / Kernel;