v4l: vsp1: Map the DL and video buffers through the proper bus master
authorMagnus Damm <magnus.damm@gmail.com>
Tue, 16 May 2017 23:20:05 +0000 (02:20 +0300)
committerKieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Fri, 9 Jun 2017 11:25:37 +0000 (12:25 +0100)
commit2cc2137ffbd191d4258cf49347578b510aa1085c
tree7e3aac8b96248b58a303be103999c1e162a85a4b
parent02533540ef8a54840a41843b8852755a543318e6
v4l: vsp1: Map the DL and video buffers through the proper bus master

On Gen2 hardware the VSP1 is a bus master and accesses the display list
and video buffers through DMA directly. On Gen3 hardware, however,
memory accesses go through a separate IP core called FCP.

The VSP1 driver unconditionally maps DMA buffers through the VSP device.
While this doesn't cause any practical issue so far, DMA mappings will
be incorrect as soon as we will enable IOMMU support for the FCP on Gen3
platforms, resulting in IOMMU faults.

Fix this by mapping all buffers through the FCP device if present, and
through the VSP1 device as usual otherwise.

Suggested-by: Magnus Damm <magnus.damm@gmail.com>
[Cache the bus master device]
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Acked-by: Mauro Cavalho Chehab <mchehab@s-opensource.com>
drivers/media/platform/vsp1/vsp1.h
drivers/media/platform/vsp1/vsp1_dl.c
drivers/media/platform/vsp1/vsp1_drv.c
drivers/media/platform/vsp1/vsp1_video.c