pinctrl: intel: Avoid potential glitches if pin is in GPIO mode
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Mon, 14 Oct 2019 09:51:04 +0000 (12:51 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 12 Nov 2019 18:21:18 +0000 (19:21 +0100)
commit2c655a11196899636a03d4d3d989c08c017fa24b
tree5a58cda880b92fadc7ca64d0e2e4c0f8e552a3e3
parent713adf6dd32723d8d8b1dbb0d1d36c46adf722d5
pinctrl: intel: Avoid potential glitches if pin is in GPIO mode

[ Upstream commit 29c2c6aa32405dfee4a29911a51ba133edcedb0f ]

When consumer requests a pin, in order to be on the safest side,
we switch it first to GPIO mode followed by immediate transition
to the input state. Due to posted writes it's luckily to be a single
I/O transaction.

However, if firmware or boot loader already configures the pin
to the GPIO mode, user expects no glitches for the requested pin.
We may check if the pin is pre-configured and leave it as is
till the actual consumer toggles its state to avoid glitches.

Fixes: 7981c0015af2 ("pinctrl: intel: Add Intel Sunrisepoint pin controller and GPIO support")
Depends-on: f5a26acf0162 ("pinctrl: intel: Initialize GPIO properly when used through irqchip")
Cc: stable@vger.kernel.org
Cc: fei.yang@intel.com
Reported-by: Oliver Barta <oliver.barta@aptiv.com>
Reported-by: Malin Jonsson <malin.jonsson@ericsson.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/pinctrl/intel/pinctrl-intel.c