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author	eopXD <yueh.ting.chen@gmail.com>
	Thu, 6 Jul 2023 17:48:58 +0000 (10:48 -0700)
committer	eopXD <yueh.ting.chen@gmail.com>
	Thu, 13 Jul 2023 07:55:10 +0000 (00:55 -0700)
commit	2c38d6332345eddb7ed0509052383dc12faef767
tree	e9be0bb2c9cc9ddba9610618e3c7751ba1d0adfe	tree \| snapshot
parent	5d18d43f26ad8c0636c20008cd0ca855940c4a3d	commit \| diff

[8/8][RISCV] Add rounding mode control variant for vfredosum, vfredusum, vfwredosum, vfwredusum

Depends on D154635

For the cover letter of the patch-set, please checkout D154628.

This is the 8th patch of the patch-set.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D154636

30 files changed:

clang/include/clang/Basic/riscv_vector.td		diff \| blob \| history
clang/lib/Sema/SemaChecking.cpp		diff \| blob \| history
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredosum.c		diff \| blob \| history
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredusum.c		diff \| blob \| history
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwredosum.c		diff \| blob \| history
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwredusum.c		diff \| blob \| history
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfredosum.c		diff \| blob \| history
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfredusum.c		diff \| blob \| history
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwredosum.c		diff \| blob \| history
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwredusum.c		diff \| blob \| history
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredosum.c		diff \| blob \| history
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredusum.c		diff \| blob \| history
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwredosum.c		diff \| blob \| history
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwredusum.c		diff \| blob \| history
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfredosum.c		diff \| blob \| history
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfredusum.c		diff \| blob \| history
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwredosum.c		diff \| blob \| history
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwredusum.c		diff \| blob \| history
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vfredosum-out-of-range.c	[new file with mode: 0644]	blob
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vfredusum-out-of-range.c	[new file with mode: 0644]	blob
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vfwredosum-out-of-range.c	[new file with mode: 0644]	blob
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vfwredusum-out-of-range.c	[new file with mode: 0644]	blob
llvm/include/llvm/IR/IntrinsicsRISCV.td		diff \| blob \| history
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td		diff \| blob \| history
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/unmasked-ta.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/vfredosum.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/vfredusum.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/vfwredosum.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/vfwredusum.ll		diff \| blob \| history

Domain: System / Toolchain;

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