drm/i915: Refactor VLV display power well init/deinit
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 29 Jun 2015 12:25:51 +0000 (15:25 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 13 Jul 2015 08:42:51 +0000 (10:42 +0200)
commit2be7d540fde3f82e404cbddeeb2fdf05cf33af3c
tree5b410246d2d54b65f57e5c9ed5cc0432089836dc
parent8fcd5cd8b3cb29019937ab4b773da27a37e8e79b
drm/i915: Refactor VLV display power well init/deinit

We do the exact same steps around the disp2d/pipe A power well
enable/disable on VLV and CHV. Refactor the shared code into
some helpers.

Note that this means we now call vlv_power_sequencer_reset() before
turning off the power well, whereas before we did it after. That
doesn't matter though since vlv_power_sequencer_reset() just resets
the power sequencer software tracking and doesn't touch the hardware
at all.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_runtime_pm.c