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(parent: 8082e3a) | patch
Add operations needed to support lowering of AffineExpr to SPIR-V.
authorMahesh Ravishankar <ravishankarm@google.com>
Tue, 12 Nov 2019 21:19:33 +0000 (13:19 -0800)
committerA. Unique TensorFlower <gardener@tensorflow.org>
Tue, 12 Nov 2019 21:20:06 +0000 (13:20 -0800)
commit2be53603e9296e86ae6ef529c37053e198560f60
tree4b4973e4480e71ad657bef790ff6edd878ac338etree | snapshot
parent8082e3a687da76929e469ec76f86957c534f59dbcommit | diff
Add operations needed to support lowering of AffineExpr to SPIR-V.

Lowering of CmpIOp, DivISOp, RemISOp, SubIOp and SelectOp to SPIR-V
dialect enables the lowering of operations generated by AffineExpr ->
StandardOps conversion into the SPIR-V dialect.

PiperOrigin-RevId: 280039204
mlir/lib/Conversion/StandardToSPIRV/ConvertStandardToSPIRV.cpp diff | blob | history
mlir/test/Conversion/StandardToSPIRV/op_conversion.mlir diff | blob | history
Domain: System / Toolchain;