[SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> fround
authorMichael Kuperstein <mkuper@google.com>
Thu, 18 Aug 2016 20:08:15 +0000 (20:08 +0000)
committerMichael Kuperstein <mkuper@google.com>
Thu, 18 Aug 2016 20:08:15 +0000 (20:08 +0000)
commit2bc3d4d46c5f19d8433fd088fa95d18f9707bde8
tree1bf251351a4472649c63fb3f1bc7f2f056386f1f
parentdea5ccb04b8be312456a5bdb6483cfb0fcb5b962
[SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> fround

The names of the tablegen defs now match the names of the ISD nodes.
This makes the world a slightly saner place, as previously "fround" matched
ISD::FP_ROUND and not ISD::FROUND.

Differential Revision: https://reviews.llvm.org/D23597

llvm-svn: 279129
22 files changed:
llvm/include/llvm/Target/TargetSelectionDAG.td
llvm/lib/Target/AArch64/AArch64InstrFormats.td
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/lib/Target/AMDGPU/SIInstructions.td
llvm/lib/Target/ARM/ARMInstrVFP.td
llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
llvm/lib/Target/Hexagon/HexagonInstrInfoV5.td
llvm/lib/Target/Mips/MipsInstrFPU.td
llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/lib/Target/PowerPC/PPCInstrQPX.td
llvm/lib/Target/PowerPC/PPCInstrVSX.td
llvm/lib/Target/Sparc/SparcISelLowering.cpp
llvm/lib/Target/Sparc/SparcInstrInfo.td
llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
llvm/lib/Target/SystemZ/SystemZInstrFP.td
llvm/lib/Target/SystemZ/SystemZInstrVector.td
llvm/lib/Target/WebAssembly/WebAssemblyInstrConv.td
llvm/lib/Target/X86/X86InstrAVX512.td
llvm/lib/Target/X86/X86InstrFPStack.td
llvm/lib/Target/X86/X86InstrSSE.td