ARM: Fix FIQ code on VIVT CPUs
authorRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 8 Aug 2013 10:51:21 +0000 (11:51 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 8 Aug 2013 11:03:29 +0000 (12:03 +0100)
commit2ba85e7af4c639d933c9a87a6d7363f2983d5ada
tree05af10b22303d92e48575cef4ec3db6b84803856
parent1b16c4bcf80e319b2226a886b72b8466179c8e3a
ARM: Fix FIQ code on VIVT CPUs

Aaro Koskinen reports the following oops:
Installing fiq handler from c001b110, length 0x164
Unable to handle kernel paging request at virtual address ffff1224
pgd = c0004000
[ffff1224] *pgd=00000000, *pte=11fff0cb, *ppte=11fff00a
...
[<c0013154>] (set_fiq_handler+0x0/0x6c) from [<c0365d38>] (ams_delta_init_fiq+0xa8/0x160)
 r6:00000164 r5:c001b110 r4:00000000 r3:fefecb4c
[<c0365c90>] (ams_delta_init_fiq+0x0/0x160) from [<c0365b14>] (ams_delta_init+0xd4/0x114)
 r6:00000000 r5:fffece10 r4:c037a9e0
[<c0365a40>] (ams_delta_init+0x0/0x114) from [<c03613b4>] (customize_machine+0x24/0x30)

This is because the vectors page is now write-protected, and to change
code in there we must write to its original alias.  Make that change,
and adjust the cache flushing such that the code will become visible
to the instruction stream on VIVT CPUs.

Reported-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/kernel/fiq.c