Add SARX/SHRX/SHLX code generation support
authorMichael Liao <michael.liao@intel.com>
Wed, 26 Sep 2012 08:26:25 +0000 (08:26 +0000)
committerMichael Liao <michael.liao@intel.com>
Wed, 26 Sep 2012 08:26:25 +0000 (08:26 +0000)
commit2b425e1e2449f91cf7e4d361287bed9c301c287d
tree4fcd795358fccb9b63b1a80f29153d436ccbd063
parent2de86af22d3e581ee1e82b2f14de2cc8b4ddaacb
Add SARX/SHRX/SHLX code generation support

llvm-svn: 164675
llvm/lib/Target/X86/X86InstrInfo.cpp
llvm/lib/Target/X86/X86InstrShiftRotate.td
llvm/test/CodeGen/X86/phys_subreg_coalesce-3.ll
llvm/test/CodeGen/X86/shift-bmi2.ll [new file with mode: 0644]
llvm/test/CodeGen/X86/targetLoweringGeneric.ll