[GlobalISel][AArch64] Teach GISel to handle shifts in load addressing modes
authorJessica Paquette <jpaquette@apple.com>
Tue, 23 Jul 2019 16:09:42 +0000 (16:09 +0000)
committerJessica Paquette <jpaquette@apple.com>
Tue, 23 Jul 2019 16:09:42 +0000 (16:09 +0000)
commit2b404d01e82692b3085a2b1fdfd24f8d2a9739a2
treebfb049e1fc7362309625efcaa58ae1cd0253e1a2
parent123f6ff299ea64db9307324c9002db5c68433720
[GlobalISel][AArch64] Teach GISel to handle shifts in load addressing modes

When we select the XRO variants of loads, we can pull in very specific shifts
(of the size of an element). E.g.

```
ldr x1, [x2, x3, lsl #3]
```

This teaches GISel to handle these when they're coming from shifts
specifically.

This adds a new addressing mode function, `selectAddrModeShiftedExtendXReg`
which recognizes this pattern.

This also packs this up with `selectAddrModeRegisterOffset` into
`selectAddrModeXRO`. This is intended to be equivalent to `selectAddrModeXRO`
in AArch64ISelDAGtoDAG.

Also update load-addressing-modes to show that all of the cases here work.

Differential Revision: https://reviews.llvm.org/D65119

llvm-svn: 366819
llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
llvm/test/CodeGen/AArch64/GlobalISel/load-addressing-modes.mir