AMDGPU: Start defining a calling convention
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 17 May 2017 21:56:25 +0000 (21:56 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 17 May 2017 21:56:25 +0000 (21:56 +0000)
commit2b1f9aa5773d5d105ebd3812745e36038f48f541
tree6f58dc77c8d0c69cc82e3cb8c23da33493b75570
parentf6c61ef64d1293a0531cbcd0afeb2a401edd501e
AMDGPU: Start defining a calling convention

Partially implement callee-side for arguments and return values.
byval doesn't work properly, and most likely sret or other on-stack
return values most as well.

llvm-svn: 303308
29 files changed:
llvm/lib/Target/AMDGPU/AMDGPUCallLowering.h
llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp
llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.h
llvm/lib/Target/AMDGPU/R600RegisterInfo.cpp
llvm/lib/Target/AMDGPU/R600RegisterInfo.h
llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
llvm/lib/Target/AMDGPU/SIFrameLowering.h
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/lib/Target/AMDGPU/SIISelLowering.h
llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
llvm/lib/Target/AMDGPU/SIRegisterInfo.h
llvm/lib/Target/AMDGPU/SOPInstructions.td
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-irtranslator.ll
llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll [new file with mode: 0644]
llvm/test/CodeGen/AMDGPU/function-args.ll [new file with mode: 0644]
llvm/test/CodeGen/AMDGPU/function-returns.ll [new file with mode: 0644]
llvm/test/CodeGen/AMDGPU/hsa-func.ll
llvm/test/CodeGen/AMDGPU/inline-asm.ll
llvm/test/CodeGen/AMDGPU/subreg_interference.mir