ARM: dts: k3: Add cfg register space for ringacc and udmap
authorVignesh Raghavendra <vigneshr@ti.com>
Mon, 7 Jun 2021 14:17:51 +0000 (19:47 +0530)
committerLokesh Vutla <lokeshvutla@ti.com>
Fri, 11 Jun 2021 13:48:52 +0000 (19:18 +0530)
commit2af181b53e286e90c3b36ba608c1c7b209e8ad8e
tree91ccb2d6b8f2a2e3e3ea6e615c06f30cdb64934d
parent00d6fc9c71e53ea2627e022ea55e02c0c676ad9c
ARM: dts: k3: Add cfg register space for ringacc and udmap

R5 SPL needs access to cfg space of Rings and UDMAP, therefore add RING
CFG, TCHAN CFG and RCHAN CFG address ranges.
Note that these registers are present within respective IPs but are
not populated in Linux DT nodes (as they are configured via TISCI APIs)
and hence are added to -u-boot.dtsi for now.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210607141753.28796-6-vigneshr@ti.com
arch/arm/dts/k3-am654-base-board-u-boot.dtsi
arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi