ARM: dts/imx6q-bx50v3: Set display interface clock parents
authorRobert Beckett <bob.beckett@collabora.com>
Thu, 14 May 2020 17:02:37 +0000 (19:02 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 3 Jun 2020 06:16:40 +0000 (08:16 +0200)
commit2ab343c835f705bce8d184e699e462d4719fa54a
tree78409aaeb949e786621e5e8791a565dcfd483cd9
parent1125e313532e67927dccbe5d9f149f0d7b161a8d
ARM: dts/imx6q-bx50v3: Set display interface clock parents

[ Upstream commit 665e7c73a7724a393b4ec92d1ae1e029925ef2b7 ]

Avoid LDB and IPU DI clocks both using the same parent. LDB requires
pasthrough clock to avoid breaking timing while IPU DI does not.

Force IPU DI clocks to use IMX6QDL_CLK_PLL2_PFD0_352M as parent
and LDB to use IMX6QDL_CLK_PLL5_VIDEO_DIV.

This fixes an issue where attempting atomic modeset while using
HDMI and display port at the same time causes LDB clock programming
to destroy the programming of HDMI that was done during the same
modeset.

Cc: stable@vger.kernel.org
Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
[Use IMX6QDL_CLK_PLL2_PFD0_352M instead of IMX6QDL_CLK_PLL2_PFD2_396M
 originally chosen by Robert Beckett to avoid affecting eMMC clock
 by DRM atomic updates]
Signed-off-by: Ian Ray <ian.ray@ge.com>
[Squash Robert's and Ian's commits for bisectability, update patch
 description and add stable tag]
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm/boot/dts/imx6q-b450v3.dts
arch/arm/boot/dts/imx6q-b650v3.dts
arch/arm/boot/dts/imx6q-b850v3.dts
arch/arm/boot/dts/imx6q-bx50v3.dtsi