powerpc/64s: POWER10 nest MMU can upgrade PTE access authority without TLB flush
authorNicholas Piggin <npiggin@gmail.com>
Wed, 25 May 2022 02:23:57 +0000 (12:23 +1000)
committerMichael Ellerman <mpe@ellerman.id.au>
Wed, 27 Jul 2022 11:36:04 +0000 (21:36 +1000)
commit2a8a0f420f74425bf5f80760fd14d7a2c3abb87d
tree8e40e11e3b1d961511d79aa2ac73d583b81ce26b
parentabf0878ce95f8a9b47d8ecf2de1d4617bec21711
powerpc/64s: POWER10 nest MMU can upgrade PTE access authority without TLB flush

The nest MMU in POWER9 does not re-fetch the PTE in response to
permission mismatch, contrary to the architecture[*] and unlike the core
MMU. This requires a TLB flush before upgrading permissions of valid
PTEs, for any address space with a coprocessor attached.

Per (non-public) Nest MMU Workbook, POWER10 nest MMU conforms to the
architecture in this regard, so skip the workaround.

[*] See: Power ISA Version 3.1B, 6.10.1.2 Modifying a Translation Table
    Entry, Setting a Reference or Change Bit or Upgrading Access
    Authority (PTE Subject to Atomic Hardware Updates):

      "If the only change being made to a valid PTE that is subject to
       atomic hardware updates is to set the Reference or Change bit to
       1 or to upgrade access authority, a simpler sequence suffices
       because the translation hardware will refetch the PTE if an
       access is attempted for which the only problems were reference
       and/or change bits needing to be set or insufficient access
       authority."

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220525022358.780745-3-npiggin@gmail.com
arch/powerpc/mm/book3s64/radix_hugetlbpage.c
arch/powerpc/mm/book3s64/radix_pgtable.c