FSL DDR: Add 85xx specific register setting
authorKumar Gala <galak@kernel.crashing.org>
Wed, 27 Aug 2008 02:34:55 +0000 (21:34 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Wed, 27 Aug 2008 16:43:48 +0000 (11:43 -0500)
commit2a6c2d7ab2a66660f40a6cd3de2eb29ee29d9693
treeb6790fbe8723c9d091518f6235eee3b6680f24d9
parent6fb1b7346849ccd0c20306143e334f5b76143070
FSL DDR: Add 85xx specific register setting

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
cpu/mpc85xx/Makefile
cpu/mpc85xx/ddr-gen1.c [new file with mode: 0644]
cpu/mpc85xx/ddr-gen2.c [new file with mode: 0644]
cpu/mpc85xx/ddr-gen3.c [new file with mode: 0644]