drm/i915/bxt: fix WaForceContextSaveRestoreNonCoherent on steppings B0+
authorImre Deak <imre.deak@intel.com>
Tue, 19 May 2015 14:05:41 +0000 (17:05 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 21 May 2015 12:02:06 +0000 (14:02 +0200)
commit2a0ee94fef9aa87f23070693764175982700f0f5
tree9eaeb0db900d6c06ff934f0329c5037b370ea0d9
parent118182e9d7d5afa0c7c10f568afb46ab78b462e9
drm/i915/bxt: fix WaForceContextSaveRestoreNonCoherent on steppings B0+

On B0 and C0 steppings the workaround enable bit would be overriden by
default, so the overriding must be disabled.

The WA was added in
commit 83a24979c40ebbf0fa0cd14df16f74142f373cd3
Author: Nick Hoath <nicholas.hoath@intel.com>
Date:   Fri Apr 10 13:12:26 2015 +0100

    drm/i915/bxt: Add WaForceContextSaveRestoreNonCoherent

Spotted-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_ringbuffer.c