x86/boot/compressed/64: Add stage1 #VC handler
authorJoerg Roedel <jroedel@suse.de>
Mon, 7 Sep 2020 13:15:20 +0000 (15:15 +0200)
committerBorislav Petkov <bp@suse.de>
Mon, 7 Sep 2020 17:45:25 +0000 (19:45 +0200)
commit29dcc60f6a19fb0aaee97bd1ae2ed8a7dc6f0cfe
tree9bcd688e264f130c2928fa2a92e6729c6cd7c372
parent21cf2372618ef167d8c4ae04880fb873b55b2daa
x86/boot/compressed/64: Add stage1 #VC handler

Add the first handler for #VC exceptions. At stage 1 there is no GHCB
yet because the kernel might still be running on the EFI page table.

The stage 1 handler is limited to the MSR-based protocol to talk to the
hypervisor and can only support CPUID exit-codes, but that is enough to
get to stage 2.

 [ bp: Zap superfluous newlines after rd/wrmsr instruction mnemonics. ]

Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20200907131613.12703-20-joro@8bytes.org
arch/x86/boot/compressed/Makefile
arch/x86/boot/compressed/idt_64.c
arch/x86/boot/compressed/idt_handlers_64.S
arch/x86/boot/compressed/misc.h
arch/x86/boot/compressed/sev-es.c [new file with mode: 0644]
arch/x86/include/asm/msr-index.h
arch/x86/include/asm/sev-es.h [new file with mode: 0644]
arch/x86/include/asm/trapnr.h
arch/x86/kernel/sev-es-shared.c [new file with mode: 0644]