Pre-reload splitter to transform and;cmp into not;test on x86.
A common idiom for testing if a specific set of bits is set in a value
is to use "(X & Y) == Y", which on x86 results in an AND followed by a
CMP. A slightly improved implementation is to instead use (~X & Y)==0,
that uses a NOT and a TEST (or ANDN where available); still two "fast"
instructions, but typically shorter especially if Y is an immediate
constant. Because the above transformation would require more gimple
statements in SSA, and may only be a win on targets with flags registers,
it isn't performed by the middle-end, instead leaving this choice to
the backend.
As an example, here's the change in code generation for pr91400-1.c
[which now requires a tweak to its dg-final clauses].
Before:
movl __cpu_model+12(%rip), %eax
andl $68, %eax // 3 bytes
cmpl $68, %eax // 3 bytes
sete %al
ret
After:
movl __cpu_model+12(%rip), %eax
notl %eax // 2 bytes
testb $68, %al // 2 bytes
sete %al
ret
2022-05-27 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* config/i386/i386.md (*test<mode>_not): New define_insn_and_split
to split a combined "and;cmp" sequence into "not;test".
gcc/testsuite/ChangeLog
* gcc.target/i386/pr91400-1.c: Update for improved code generation.
* gcc.target/i386/pr91400-2.c: Likewise.
* gcc.target/i386/testnot-1.c: New test case.
* gcc.target/i386/testnot-2.c: Likewise.