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(parent: 0781e93) | patch
[mlir][spirv] Add lowering for load/store zero-rank memref from std to SPIR-V.
authorHanhan Wang <hanchung@google.com>
Fri, 21 Feb 2020 19:39:32 +0000 (14:39 -0500)
committerHanhan Wang <hanchung@google.com>
Fri, 21 Feb 2020 19:41:12 +0000 (14:41 -0500)
commit29ad9d6b26ee92c7843c06392625d894d58658c2
tree0b1c93a926542e5f32a6aebd2d1adba2cfdd5922tree | snapshot
parent0781e93a6eaa71ec5d87be3bbeeeed053067f7eecommit | diff
[mlir][spirv] Add lowering for load/store zero-rank memref from std to SPIR-V.

Differential Revision: https://reviews.llvm.org/D74874
mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp diff | blob | history
mlir/test/Conversion/StandardToSPIRV/std-to-spirv.mlir diff | blob | history
mlir/test/Dialect/SPIRV/Serialization/memory-ops.mlir diff | blob | history
Domain: System / Toolchain;