mmc: sdhci-esdhc-imx: fix HS400 timing issue
authorBOUGH CHEN <haibo.chen@nxp.com>
Thu, 27 Dec 2018 11:20:24 +0000 (11:20 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 23 Mar 2019 19:09:57 +0000 (20:09 +0100)
commit2946910ed8377100a3f23a558a8bc8fd83d0302a
tree1db615f8a5e55a900de2d98cdf704f939a1aa863
parentc19b9673487e3b9bcabd401e920553d074f6cba2
mmc: sdhci-esdhc-imx: fix HS400 timing issue

commit de0a0decf2edfc5b0c782915f4120cf990a9bd13 upstream.

Now tuning reset will be done when the timing is MMC_TIMING_LEGACY/
MMC_TIMING_MMC_HS/MMC_TIMING_SD_HS. But for timing MMC_TIMING_MMC_HS,
we can not do tuning reset, otherwise HS400 timing is not right.

Here is the process of init HS400, first finish tuning in HS200 mode,
then switch to HS mode and 8 bit DDR mode, finally switch to HS400
mode. If we do tuning reset in HS mode, this will cause HS400 mode
lost the tuning setting, which will cause CRC error.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Cc: stable@vger.kernel.org # v4.12+
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Fixes: d9370424c948 ("mmc: sdhci-esdhc-imx: reset tuning circuit when power on mmc card")
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/mmc/host/sdhci-esdhc-imx.c