author | Igor Breger <igor.breger@intel.com> | |
Wed, 17 May 2017 12:48:08 +0000 (12:48 +0000) | ||
committer | Igor Breger <igor.breger@intel.com> | |
Wed, 17 May 2017 12:48:08 +0000 (12:48 +0000) | ||
commit | 28f290fab8590744c3aedfb275f288b240aa4585 | |
tree | 5d84dfdee4c682a220ac060c00936d086499d789 | tree | snapshot |
parent | 8722ade770bdbb249026271436341adc28fac39c | commit | diff |
llvm/lib/Target/X86/X86InstructionSelector.cpp | diff | blob | history | |
llvm/lib/Target/X86/X86LegalizerInfo.cpp | diff | blob | history | |
llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll | diff | blob | history | |
llvm/test/CodeGen/X86/GlobalISel/legalize-add.mir | diff | blob | history | |
llvm/test/CodeGen/X86/GlobalISel/regbankselect-X32.mir | [new file with mode: 0644] | blob |
llvm/test/CodeGen/X86/GlobalISel/select-add-x32.mir | [new file with mode: 0644] | blob |