[RISCV] Teach ComputeNumSignBitsForTargetNode about masked atomic intrinsics
authorAlex Bradbury <asb@igalia.com>
Wed, 3 Aug 2022 12:41:58 +0000 (13:41 +0100)
committerAlex Bradbury <asb@igalia.com>
Wed, 3 Aug 2022 12:41:58 +0000 (13:41 +0100)
commit28f12a09ae631885410d7524f7c60748a59358c5
tree466f87ce8e4a54a2f90ce839eefe5783980bd2ff
parentd4cab870940692bfda2433de83d1a4d0349bc9aa
[RISCV] Teach ComputeNumSignBitsForTargetNode about masked atomic intrinsics

An unnecessary sext.w is generated when masking the result of the
riscv_masked_cmpxchg_i64 intrinsic. Implementing handling of the
intrinsic in ComputeNumSignBitsForTargetNode allows it to be removed.

Although this isn't a particularly important optimisation, removing the
sext.w simplifies implementation of an additional cmpxchg-related
optimisation in D130192.

Although I can't produce a test with different codegen for the other
atomics intrinsics, these are added as well for completeness.

Differential Revision: https://reviews.llvm.org/D130191
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll
llvm/test/CodeGen/RISCV/atomic-signext.ll