R600/SI: add pass to mark CF live ranges as non-spillable
authorTom Stellard <thomas.stellard@amd.com>
Tue, 12 May 2015 17:13:02 +0000 (17:13 +0000)
committerTom Stellard <thomas.stellard@amd.com>
Tue, 12 May 2015 17:13:02 +0000 (17:13 +0000)
commit28d13a4b1298eab01e90580d13e1d2589d848862
tree955dd1c2f4853e54ab5f51a05746a6d330e0fdc8
parent3acf6275e629caba57e061b01adaf5185d81ac61
R600/SI: add pass to mark CF live ranges as non-spillable

Spilling can insert instructions almost anywhere, and this can mess
up control flow lowering in a multitude of ways, due to instruction
reordering. Let's sort this out the easy way: never spill registers
involved with control flow, i.e. saved EXEC masks.

Unfortunately, this does not work at all with optimizations disabled,
as the register allocator ignores spill weights. This should be
addressed in a future commit.

The test was reduced from the "stacks" shader of [1]. Some issues
trigger the machine verifier while another one is checked manually.

[1] http://madebyevan.com/webgl-path-tracing/

v2: only insert pass with optimizations enabled, merge test runs.

Patch by: Grigori Goronzy

llvm-svn: 237152
llvm/lib/Target/R600/AMDGPU.h
llvm/lib/Target/R600/AMDGPUTargetMachine.cpp
llvm/lib/Target/R600/CMakeLists.txt
llvm/lib/Target/R600/SIFixControlFlowLiveIntervals.cpp [new file with mode: 0644]
llvm/test/CodeGen/R600/si-spill-cf.ll [new file with mode: 0644]