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(parent: 879791a) | patch
drm/amd/display: update dcn315 clock table read
authorDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Wed, 30 Mar 2022 20:05:50 +0000 (16:05 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 6 Apr 2022 16:02:57 +0000 (12:02 -0400)
commit28c25238898a242c58bfaff3f46a006585c2dd94
tree67d777c207e45d073cc728930326440c4b4ad6fbtree | snapshot
parent879791ad8bf3dc5453061cad74776a617b6e3319commit | diff
drm/amd/display: update dcn315 clock table read

[Why & How]
Make dcn315 base its clock table off dcfclk rather than fclk.

This change also adds some sanity checking to make sure an
empty pmfw table does not result in invalid dal clocks.

Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c diff | blob | history
Domain: System / Kernel;